The present invention relates to direct current bus voltage regulators and more particularly to an apparatus for limiting both DC bus voltage and inverter output current and a voltage/frequency drive.
In motor controls, a change in inverter frequency with respect to time is referred to as a slew rate and a slew rate can be either a positive slew rate (i.e. tending to drive a motor in a clockwise direction) or a negative slew rate (i.e. tending to drive a motor in a counter-clockwise direction). A slew rate determiner is typically provided which provides a standard slew rate when there is a difference between a commanded inverter frequency and an actual inverter frequency.
The controls industry has generally recognized that an AC inverter for supplying alternating current to an AC motor can cause a DC bus voltage on a DC bus linked to the inverter to exceed a maximum safe voltage limit during regeneration. Regeneration occurs when an inverter is used to slow down a motor linked thereto by reducing the inverter/motor frequency or if the load is overhauling (i.e. the motor speed is higher than the inverter frequency).
During motor deceleration the motor operates as an electric power source providing current back through the inverter to the DC bus, hence the term regeneration. The energy delivered back to the DC bus is stored in bus capacitors and thus causes a rise in DC bus voltage. The rise in DC bus voltage can become serious when the rate at which electric power is delivered to the DC bus exceeds the maximum dissipation rate available to the bus. Under these conditions the DC bus voltage may rise dangerously high and cause damage to electrical components. In particular, the voltage may exceed the voltage rating for semiconductor switches or the DC bus capacitors and thereby may damage or destroy those components. When the bus voltage exceeds the maximum DC bus voltage the motor is said to be in an overvoltage condition or in overvoltage operation.
Also, as well known in the controls industry, dangerous/damaging currents can be caused in the inverter switches when then inverter fundamental frequency leads the motor mechanical speed or frequency by an excessive amount. This condition can occur during certain operating conditions such as, for example, during motor acceleration with a large load which tends to maintain an instantaneous motor speed as the inverter is attempting to achieve a greater relative speed. In another case, where an inverter is used to decelerate a motor via inverter braking action (i.e. providing voltages to the motor at a frequency which is less than the instantaneous motor mechanical frequency), if a mechanical brake is also used to slow the motor or if the motor load increases quickly, the motor mechanical frequency may quickly drop below the inverter frequency thereby causing the inverter to operate instantaneously as a motor with a large slip, providing an excessive motor current. When the motor current exceeds the maximum motor current the motor is said to be in an overcurrent condition or in overcurrent operation.
Methods in the prior art for keeping a motor out of overvoltage operation include, just prior to overvoltage occurring, overriding the standard slew rate to freeze the inverter frequency. Similarly, methods for keeping a motor out of the overcurrent condition include, just prior to overcurrent occurring, overriding the standard slew rate to freeze the inverter frequency. After either the overvoltage or overcurrent operation subsides, deceleration or acceleration is continued at the standard slew rate until some other limit condition occurs at which point the standard rate is again overridden.
Unfortunately, the frequency freezing solution has a number of shortcomings. First, during deceleration, as inverter frequency is rapidly altered back and forth between the standard slew rate and the frozen rate, deceleration oscillation occurs and therefore deceleration is uneven and erratic. Similarly, during acceleration, as inverter frequency is rapidly changed back and forth between the standard slew rate and the frozen rate, acceleration is erratic.
Second, despite freezing the inverter frequency just prior to an overvoltage condition, overvoltage can still occur. In this case overvoltage occurs as a result of the slip characteristics of an AC motor. Slip arises because most AC motors run at a speed slightly less than synchronous speed under motoring conditions. Even though the inverter frequency is frozen at the frequency found when the DC voltage of the bus is just below the voltage limit, the motor may continue to decelerate as a result of the slip characteristics to a speed less than the inverter frequency. This continued deceleration can cause additional DC bus voltage and therefore can cause overvoltage.
One solution for maintaining the DC bus voltage below a voltage limit is described in U.S. Pat. No. 5,089,760, which is entitled "DC Bus Voltage Regulation By Controlling The Frequency In A Variable Frequency Inverter" which issued to Joyner, Jr. on Feb. 18, 1992 (hereinafter "the '760 patent"). The '760 patent teaches a regulator wherein, just prior to overvoltage, the negative slew rate is overridden and the inverter frequency is actually accelerated slightly. This instantaneous acceleration does two things. First, the inverter frequency acceleration ensures that the motor frequency will not continue to slow down thereby causing an overvoltage condition. Second, the instantaneous acceleration allows the DC bus capacitor to dissipate some of its excess energy thereby placing a ceiling on the capacitor voltage level which is just below the overvoltage condition.
The '760 patent operates like the prior art described above to avoid overcurrent conditions. That is, just prior to an overcurrent condition during acceleration, the '760 patent configuration reduces inverter frequency acceleration to reduce motor current. While the '760 patent may very well avoid overvoltage altogether, the '760 patent solution has at least two shortcomings. First, the '760 patent neither teaches nor suggests how a maximum deceleration rate is selected. For example, after a voltage limit condition occurs, should the slew rate be reduced by 1 Hz/s, by 10 Hz/s, by 10% of the original slew rate, by 15% of the original slew rate, etc.? The problem here is that, on one hand if the deceleration rate is not decreased sufficiently the maximum DC bus voltage will be exceeded and the exact condition to be avoided (i.e. overvoltage) will occur. On the other hand, if the deceleration rate is decreased to much, the time required to reduce motor speed to a commanded speed is extended.
Second, after a modified deceleration rate is selected, the '760 patent fails to teach or suggest how an optimum rate is maintained. In fact, the '760 patent appears to include inconsistent teachings in this regard. First, with respect to FIG. 2A and text related thereto, it appears as though the '760 patent teaches that after voltage limit conditions are identified, the '760 patent configuration overrides the standard slew rate until a commanded inverter frequency is achieved. Presumably the overriding slew rate is based on the difference between the maximum DC bus voltage and the actual DC bus voltage and is adjusted to maintain the actual voltage essentially equal to the maximum DC bus voltage.
The problem with a system which modifies slew rate after a voltage limit condition occurs solely to eliminate the difference between the actual and maximum DC bus voltages is that an uncontrolled loop may occur resulting in damaging overcurrent conditions. As described above, during voltage limiting deceleration, if a load is quickly stopped via a mechanical brake or the like, the inverter actually instantaneously operates as a motor to accelerate the load thereby causing an overcurrent condition. If the slew rate is locked in the voltage limiting loop and cannot be adjusted to limit current, system damage can occur due to high overcurrents.
Second, with respect to FIG. 7 and text related thereto, the '760 patent teaches that when the '760 patent system comes out of a voltage limiting period, control reverts back to the slew determiner (i.e. ramp function 180). If another voltage limit condition occurs the standard slew rate is again overridden. Similarly, if an overcurrent condition occurs the standard slew rate is temporarily overridden. Thus, as with the prior art systems, oscillation may occur between the standard slew rate and an overriding slew rate which results in erratic acceleration and deceleration.